Retirees of UNISYS and Lockheed Martin MS2

Twin Cities Information Technology Pioneers
Home     Legacy, LMCO     UNISYS Legacy     People     Engineering     Computers     Systems     Facilities     Links, Docs, Index     Contact Us      
24-bits     36-bits     30-bits     18-bits     32-bits     16-bits     Air Force     Other     Processors, Commercial      
32-Bit Computers
1. Introduction
The LEGACY computers are listed by Instruction Set Architecture bit length because the ISA established a thread of commonality and similarity through a line of systems. This led to commonality of support software, experienced programmers, and commonality of maintenance engineer knowledge, and customer confidence in operational reliability. [lab] 
 On this page, scroll to: 
  1. Introduction [left]
  2. Computer Family 
  3. 32 bit descriptions [below]


2. Computer Family

AN/UYK-7, AN/AYK-10, CP-140, and AN/UYK-43

 

Note that the Nike Tactical Intercept Computer (TIC) and the CLC successor were 32 bits also, but a different ISA than the above Navy computers.  These are discussed on the Computers, Other page.


3. Computer Descriptions


3.1 AN/UYK-7
     The AN/UYK-7 standard shipboard computer was designed in accordance with stringent military specifications as to performance and ruggedness. It was in use throughout the U.S. Navy. 

     The AN/UYK-7 became the heart of the second generation NTDS system, replacing the aging 20Bs while implementing an architecture capable of supporting multiple I/O controllers and having multiple processors sharing memory and software tasks.  Innovations in this design are numerous, i.e. an eight port memory that allowed three processors and two I/O controllers to be accessing memory concurrently as long as the memory Sources were to different memory banks.  The first enhancement to the AN/UYK-7 was the implementation of a film memory chassis which created a 32k word memory in the same volume as the initial 16-k core memory chassis.  The film memory technology was adapted from the AN/AYK-10's memory design.  Each memory chassis had eight memory buses.  In a multi-processor configuration; three instruction fetches, three operand fetches, and two I/O word transfers could take place simultaneous if all were referencing different memory banks.
     The UYK-7 design used the heat sink, T-bar card design and heat exchanger design from the CP-901.  The integrated circuit flat packages were mounted onto a conductor which carried chip heat to the T-bar at the top.  When inserted into chassis, a heat exchanger plate was clamped to the chassis.  Air forced through the heat exchanger cooled the unit.  The typical operating temperature of components on this card type was 30 degrees above ambient.
     The lead logic designer from the CP-901, Ken Oehlers also became the lead processor designer for the UYK-7.  John Bonnes also joined the design team for this computer as the CP-901 checkout lead was taken over by Lowell Benson. [lab] 
     The UYK-7 was succeeded on 688 fast attack submarines, Trident submarines, and surface ships by the standard shipboard computers, the AN/UYK-43 and -44.  These provided computing power for the U.S. Navy for decades.
A common executive program facilitated operational programming.


3.2 Unisys Type 1832, AN/AYK-10  - Also called the S3A computer.
     The AN/AYK-10 is a dual processor, dual I/O controller airborne version of the UYK-7 ISA with special I/O used for ASW missions aboard the Lockheed S3A carrier based aircraft.  Innovations of this design: 1) dual mated film memory chassis running at 1.5 microseconds - each with 6 access ports.  2) a dual processor design interconnected so that if one CPU or one memory chassis or one I/O chassis failed, the system would continue to operate in a reduced capacity mode.  Thus a reduced flight mission could continue - maybe just track 3 sono-buoys instead of 6 to 8, etc. 3) a unique frame design that fit at the rear of the S3A crew compartment - the wheels folded up almost against the sides of the Power Supply and third memory drawer.

     Don Mager was the project engineer, Gary Bosworth and Gerry Shaw were two of the design engineers on this project. The operational software was developed by Sperry at the Valencia operations building. The first computer was delivered on 9/14/1970.  There were a total of 205 of these computers built, including those for the CP-140. [lab]
     Photo submitted by Jim Rapinac.  Sperry Univac DSD attendees, L-R present at the first aircraft roll-out were:

  • Jim Rapinac, General Manager, Special Programs, Salt Lake City
  • Bill McGowan, Marketing Rep, LA office
  • Ernie Hams, VP Program Management
  • Dick Gehring, VP and General Manager
  • Ken
    Oehlers, S-3A Engineering Director
  • Dan Brophy, S-3A Program Manager
  • Dewaine Osman, VP Marketing
  • John Spearing, DSD Valencia Site Manager
  • Norbert Kielbach, Marketing Rep, LA office
     


3.3 The CP-140 is the Canadian Patrol aircraft developed for their Aurora program.  It is essentially the Canadian version of the P3C for their ASW missions.  Instead of the CP-901 computer, it used the Sperry 1832 three memory chassis instead of the two used aboard the US Navy's S3A.  The Canadian government nomenclature assigned to this machine was AN/AYK-502, not to be confused with the later AN/UYK-502 shipboard mini-computer. 

 

The Canadians were instrumental in providing funding for the development of a semi-conductor memory chassis for this computer as a replacement for the aging mated film memory.  These new memory chassis were manufactured at the Winnipeg facility and sub sequentially back fitted into the S3 airplanes. [lab]


3.4 S3B Systems Computer

The 1832 (AN/AYK-10) enhanced version implemented a doubled capacity semiconductor memory chassis (designed for the AN/AYK-502) to upgrade the original film memory drawers.
     The aircraft nomenclature was upgraded to S3B because Sperry Univac also did a design update to the Input/Output Controllers to effect a Harpoon missile launch capability.  The four 6" x 6" PC cards weighed just 3 lb. instead of the MacDonald Douglas 40 lb. launch computer used aboard the P3C.  The power consumption of this feature was an additional 5 watts compared to the 200 watts on the P3C.  Gerry Shaw, Gary Bosworth, and I did the technical work on the proposal.  Ken Graber and Mark Nelson did most of the logic and electrical design of the launch interface.

     Especially tricky was the Failure Modes and Effects Analysis which Mark did.  He had to determine how the failure of any component would manifest itself, i.e. not allow the system to launch or accidentily launch the missile.  No single component failure could launch!  Good job with the design Mark and Ken. [lab]


3.5 AN/UYK-43 - This 32-bit ISA was specified for the emerging UYK-7 replacement, the UYK-43 as the third generation NTDS computer.  Won by UNISYS.  This unit's innovations included a designed in maintenance processor, cache memory for performance enhancements, and plug-in NATO Serial interface.  Most of the logic design was implemented using Gate Array technologies.

 

Many of the command and control functions are transitioning yet to the Q-70 as a fourth generation NTDS core. [lab]

 


VIP Page 55 updated 01 May, 2008